RSP'98
Final Program

June 3-5, 1998
Leuven, Belgium

 

Wednesday, June 3, 1998

08:30

registration

09:00

Welcoming Remarks

09:15

Keynote speak

Next Generation Configware merging Prototype and Product (R. Hartenstein, Univ. of Kaiserslautern, Germany)

10:00

Break

10:20

Session 1: Methods and Algorithms for Rapid-Prototyping
(session chair, R.Lauwereins)

  1. Testing Prototypes Validity to Enhance Code Reuse (D. Buchs, A. Diagne, F. Kordon)
  2. Real Time Prototyping Method and a Case Study ( H. Krupnova, D. D. Anh Vu, G. Saucier, M. Boubal)
  3. TESH Network Based Rapid Prototyping of Parallel Processing Systems (V. K. Jain, B. M. Marziarz)
  4. APICES - Rapid Application Development with Graph Pattern (A. Bredenfeld)

12:00

Lunch

14:00

Session 2: Reconfigurable and Reusable Architectures
(session chair Klaus Buchenrieder)

  1. Real-Time Prototyping in Microprocessor/Accelerator Symbiosis (J. Becker, R. W. Hartenstein)
  2. The Plastic Cell Architecture for Dynamic Reconfigurable Computing (H. Ito, K. Oguri, K. Nagami, R. Konishi, T. Shiozawa)
  3. Reusable architecture templates and automatic specification mapping in the efficient implementation of ATM products (A. Birbas, N. S. Voros, V. Mariatos, M. Birbas, N. Pertellis, S. Batistatos)
  4. FORTRESS, a FORTH development environment for embedded real-time control ( Peter Vaes, Jan Vandewege)

15:40

Break

16:10

Session 3: Emulation
(session chair Reiner W. Hartenstein)

  1. Run-Time Monitoring of Communication Activities in a Rapid Prototyping Environment (A. Kirschbaum, J. Becker, M. Glesner)
  2. Emulating Large Designs on Small Reconfigurable Hardware (D. Bhatia, K. M. Gajjala Purna)
  3. OMI-Compliant Model for Virtual Emulation (D. Dozza, R. Rambaldi, M. Borgatti, R. Guerrieri)
  4. Behavioral Emulation of Synthesized RT-level Descriptions Using VLIW Architectures (T. Buchholz, G. Haug, U. Kebschull, G. Koch, W. Rosenstiel)

17:50

18:25

Social Event: walk through Leuven

Thursday, June 4, 1998

8:30

Session 4: Rapid Prototyping Systems and Issues
(session chair Jürgen Becker)

  1. An extensible, low cost rapid prototyping environment (G. P. Alexiou, K. Adaos, N. Kanopoulos)
  2. A Prototyping System for High Performance Communication Systems (M. Dörfel, R. Hofmann)
  3. The STEP Standard as a Framework for Design and Prototyping (A. Plantec, V. Ribaud)
  4. An Open Simulation and Modeling Environment for Embedded Real-Time Systems (W. Van Almsick, T. Drabe, W. Daehn, C. Mueller-Schloer)
  5. Truly Rapid Prototyping Requires High-Level Synthesis (M. Leeser, G. Doncev, S. Tarafdar)

10:35

Break

11:00

Session 5: Industrial Views
(session chair Jean-Yves Brunel)

  1. Rapid System Prototyping for Real-Time Design Validation (Michel Courtoy)
  2. Rapid Prototyping Technology Accelerates Software Development For Complex Network Systems (S. Shtil, V. Bhatia)
  3. Performance and Interface Buffer Size Driven Behavioral Partitioning for Embedded Systems (T-C Lin, S.M. Sait, W.R. Cyre)

12:15

Lunch

14:00

Session 6: Design Cases
(session chair Fabrice Kordon)

  1. Rapid Prototyping of a Co-Processor based Engine Knock Detection System (A. Kirschbaum, S. Ortmann, M. Glesner)
  2. RIFLE-62: A Flexible Environment for Prototyping Dynamically Reconfigurable Systems (M. Vasilko, D. Long)
  3. FLYSIG: Dataflow Oriented Delay-Insensitive Processor for Rapid Prototyping of Signal Processing (W. Hardt, B. Kleinjohann)
  4. Rapid Design of Discrete Orthonormal Wavelet Transforms (S. Masud, J. V. McCanny)

15:40

Break

16:00

Session 7: Rapid Prototyping in the ISIS Project (Leuven)
(session chair Nick Kanopoulos)

  1. Implementation of an RTLS Blind Equalization Algorithm on DSP (P. Vandaele, G. Rombouts, M. Moonen)
  2. A Technique for Combined Virtual Prototyping and Hardware Design (P. Schaumont, G. Vanmeerbeeck, E. Watzeels, S. Vernalde, M. Engels, I. Bolsens)
  3. Code Generation of Data Dominated DSP Applications for FPGA Targets (J. Dalcomo, R. Lauwereins, M. Adé)

17:15

Project Demo

18:15

19:00

Driwing to WorkShop Banquet

Friday, June 5, 1998

08:30

Session 8: Applications
(session chair Marleen Adé)

  1. The Video and Image Processing Emulation System VIPES (H. Kropp, C. Reuter, P. Pirsch)
  2. Virtual Prototyping of a Digital Neural Current Controller (A. Dinu, M. N. Cirstea, M. McCormick)
  3. Using CDIF for Concept-Oriented Rapid Prototyping of Electronic Systems (A. Burst, M. Wolff, M. Kühl, K. D. Müller-Glaser)
  4. A Library of Memory Controller for an Image Processing Prototyping System (F. Lisa-Mingo, J. Carrabina)
  5. Towards a Rapid Prototyping by Linking Design, Implementations and Debugging in Real Time Parallel Systems (C. E. Morón, J. R. P. Ribeiro, N. C. da Silva)

10:35

Break

11:00

Session 8: Hardware/Software Co-Design and Co-Simulation
(session chair Manfred Glesner)

  1. Hardware, Software and Mechanical Cosimulation (P. Le Marrec, M. Attia, O. Cayrol, C.A. Valderrama, F. Hessel, A.A. Jerraya)
  2. A Data-Flow Oriented Co-Design for Reconfigurable Systems (J. -P. David, J. -D. Legat)
  3. HW/SW Cosynthesis using Statecharts and Symbolic Timing Diagrams (K. Lüth, T. Peikenkamp, J. Niehaus)
  4. Performance Evaluation Tool for Rapid Prototyping of Hardware-Software Codesigns (K. S. Chata, R. Vemuri)

12:40

Closing Session

13:00

Lunch

14:00



Last Modified: 03/26/2006 by F.Kordon on behalf of the program committee.