Program of RSP'2007
Monday the 28th of May
8.30 – 9.00: Registration
9.00 – 9:30: Introduction
9.30 – 10:30: Keynote Speech by Victor Mammana from Centro
de Pesquisas Renato Archer
10.30 – 11.00: Coffee Break
11.00 – 12.30 Session 1: Co-Design, Session Chair:
Dionisis Pnevmatikatos
Cache-Analyzer:
Design Space Evaluation of Configurable-Caches in a Single-Pass,
A. Silva, G. Esmeraldo, P. Viana, E. Barros, Federal University
of Pernambuco, Br
Reconfigurable
Co-Design of Computationally Intensive Problems, K. Kent,
University of New Brunswick, B. Iaderoza, M. Serra,
University of Victoria, Ca
Unified
Inter-Communication Architecture for Systems-on-Chip, F Rincón,
J. Barba, F. Moya, F.J. Villanueva, D. Villa, J. Dondo, J.C.
López, University of Castilla-La Mancha, Sp
12.30 –
14.00: Lunch
14.00
– 16.00 Session 2: HW performance, Session Chair: Kenneth Kent
SPP-NIDS
- A Sea of Processors Platform for Network Intrusion Detection
Systems, L. Carlos Caruso, G. Guindani, H. Schmitt, F. Moraes,
PUCRS, Br
Congestion-Aware
Task Mapping in NoC-based MPSoCs with Dynamic Workload, E.
Carvalho, PUCRS, Br
A
Hardware Implementation of 2-Opt Local Search Algorithm for the
Traveling Salesman Problem, I. Mavroidis, D. Mavroidis,
Technical University of Crete, Gr
Hardware/Firmware
Verification of IP, R. Kamdem, STMicroelectronics - Home
Video Display/R&D, F
16.00 –
16.30: Coffee Break
16.30
– 17.50 Session 3: Short papers 1/3, Session Chair: Jerome Hugues
FPGA
Communication
Models in Networks-on-Chip, E. Carara, A. Mello, F. Moraes,
PUCRS, Br
A Lightweight Framework for Runtime
Reconfigurable System Prototyping, R.
Koch, T. Pionteck, C. Albrecht, E. Maehle, Institute of Computer
Engineering, University of Luebeck, Ge
Applications
Design
and Implementation of a Reconfigurable, Embedded Real-Time Face
Detection System, V. Mariatos, Diaplous Machine Vision,
K.D. Adaos, G.P. Alexiou, Dept. of Computer Engineering and
Informatics, Univ. of Patras, Gr
Object-Oriented
Reconfiguration, J. Mattos, A. Carlos S. Beck, L. Carro,
Federal University of Rio Grande do Sul, Br
18.00 – 20.00 Welcome Reception
Tuesday, 29th of May
9.00
– 10.00: Keynote Speech by Thierry Collette from CEA LIST, F
10.00
– 10.30: Coffee Break
10.30
– 12.00 Session 4: Formal Specification, Sessions Chair: Michel Lemoine
A
Semantics for UML-RT using pi-calculus, J. de Melo Bezerra, C.
Massaki Hirata,
Verifying
Distributed Protocols using MSC-Assertions, Run-time Monitoring, and
Automatic Test Generation, D. Drusinsky, Man-Tak Shing, Naval
Postgraduate School, USA
Rapid
Prototyping of Intrusion Detection Systems, F. Kordon, J.-B.
Voron, UPMC/LIP6/MoVe, F, L. Iftode, Rutgers University,
USA
12.00
– 13.30: Lunch
13.30
– 15.00: Session 5: Prototyping and Development
methodologies and tools, Session Chair: Eduardo Todt
A
Tailored Design Partitioning Method for Hardware Emulation, R.
Beckert, T. Fuchs, S. Ruelke, Fraunhofer IIS Design Automation
Devision, Dresden , Ge, W. Hardt, Chemnitz University of
Technolog, Dresden Ge
Rapid
Prototyping of Distributed Real-Time Embedded Using the AADL and
Ocarina, J. Hugues, B. Zalila, L. Pautet, GET-Telecom
Paris, F, F. Kordon, UPMC/MoVe, F
Efficient
Software Development Platforms for Multimedia Applications at
Different Abstraction Levels, K. Popovici, X. Guérin,
A. A. Jerraya, F. Rousseau, TIMA Laboratory. Grenoble, F, P.
S. Paolucci, ATMEL Roma, It
15.00
– 15.30: Coffee Break
15.30
– 16.30 Session 6: Testing, Session Chair: Cesar Marcon
A
Flexible Simulation Platform for Rapid Transactional Memory Systems
Evaluation, A. Baldassin, P. Centoducatte, F. Kronbauer, B.
Albertini, S. Rigo, G. Araujo, LSC – UNICAMP, Br
Nonintrusive
Black- and White-Box Testing of Embedded Systems Software against
UML Models, P. Graf, K. D. Müller-Glaser, University
of Karlsruhe, Ge, C. Reichmann, aquintos GmbH, Ge
16.30
– 17.30 Session 7: Short papers 2/3, Session Chair:
Fabiano Hessel
20.00: Banquet
Wednesday, 30th of May
9.00
– 10.00: Keynote Speech by Fabrice Kordon from LIP6/MoVe
10.00
– 10.40 Session 8: Short Papers 3/3, Session Chair: Man-tak Shing
Formal
Specification
Behavioral
synthesis of property specification language (PSL) assertions,
H. Obereder, M. Pfaff, C. Saminger, University of Applied
Sciences, Hagenberg, Ge
Structured
Approach to Property Specification and Verification of Hardware IP,
L. Benalycherif, A. Mcisaac, N. Dunlop, STMicroelectronics, F
10.40 – 11.10: Coffee Break
11.10
– 12.40 Session 9: Applications, Session Chair: Ahmed Jerraya
A
CABAC Encoder Design of H.264/AVC with RDO Support, X. Tian,
T. M. Le, B-L. Ho, L. Yong, National University of Singapore, Si
FPGA
prototyping strategy for a H.264/AVC video decoder, W. S. Rosa,
W. T. Staehler, A. P. Azevedo Filho, L. V. Agostini, A. A. Susin,
S. Bampi, UFGRS, Br
ER-EDF:
A QoS scheduler for real-time embedded systems, D. Matshulat,
C. Marcon, F. Hessel, PUCS, Br
12.40
– 14.00: Lunch
14.00
– 15.30 Session 10: FPGA and SW algorithms, Fernando Moraes
Pre-
and Post-Fabrication Architecture Exploration for Partially
Reconfigurable VLIW Processors, A. Chattopadhyay, Z. Rakosi,
D. Kammler, R. Leupers, G. Ascheid, H. Meyr, ISS, RWTH Aachen
University, Ge
Low
Runtime Overhead Software Synthesis for Communicating Concurrent
Processes, Y. Cho, K. Choi, Seoul National University, Ko,
N-E. Zergainoh, A. A. Jerraya, TIMA Laboratory, F
A
Re-configurable FTL Architecture for NAND Flash based Applications,
C. Park, W. Cheon, Y. Lee, Samsung Electronics Co., Ltd
15.30
– 16.00
Information
about RSP’08
Farewell
End of RSP’07
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