Registration

Opening Welcome

P. Mosterman, The MathWorks, Inc., USA
Advanced Technologies to Accelerate Mixed Signal Simulation

Break

Session 1: Software Verification
(Session Chair: B. Michael - Naval Postgraduate Shool)

1. Dynamic Synchronisation of Run-Time Information Models for Debugging Embedded Software
   Philipp Graf,Klaus D. Muller-Glaser (University of Karlsruhe)
2. Principles for System Prototype and Verification using Meta-Modeling based Transformations
   Luis Pedro, Levi Lucio, Didier Buchs (University of Geneva)
3. Creation and Validation of Embedded Assertion Statecharts
   Doron Drusinsky, Man-Tak Shing and Kadir Alpaslan Demir (Naval Postgraduate School)
4. Early Embedded Software Exploration Using UML-based Estimation
   Marcio F. da S. Oliveira, Lisane B. de Brisolara, Luigi Carro, Flavio R. Wagner (Federal University of Rio Grande do Sul)

Lunch

Session 2: Hardware Performance Estimation
(Session Chair: K. Kent - Univ. New Brunswick)

1. A Prototyping Tool for Analysis and Modeling of Video Transmission Traces over IP Networks
   Ming Yang, Nikolaos Bourbakis (Information Technology Research Institute Wright State University)
2. Rapid Resource-Constrained Hardware Performance Estimation
   Basant K. Dwivedi (Calypto Inc.), Arun Kejariwal (University of California at Irvine), M. Balakrishnan, Anshul Kumar (Indian Institute of Technology, Delhi)
3. Rapid Performance and Power Consumption Estimation Methods for Embedded System Design
   Smail Niar, Nicolas Inglart (Universit´ de Valenciennes et du Hainaut-Cambr´sis)
4. Performance Evaluation of an Adaptive FPGA for Network Applications
   Christoforos Kachris, Stamatis Vassiliadis (Delft University of Technology)
   

Break

Session 3: Design Methodologies
(Session Chair: G. Nicolescu - Ecole Polytechnique de Montréal)

1. A mixed-level virtual prototyping environment for refinement-based design methodology 
   Sanggyu Park, Sangyong Yoon, and Soo-Ik Chae (Seoul National University)
2. Fast Prototyping of POSIX based applications on a Multiprocessor SoC Architecture: Hardware-dependent software oriented approach
   Benaoumeur Senouci, Aimen Bouchhima, Frederic Rousseau, Frederic Petrot, Ahmed Jerraya (TIMA Laboratory)
3. The Prototyping Methodology of a Data Receiver for Digital Audio Broadcasting (DAB) Networks
   P. J. Lobo, M. A. Freire, M. J. Garrido, C. Sanz, F. Pescador and D. Samper (Universidad Politecnica de Madrid)
4. System-on-Chip Design Methodology for an Adaptive Statistical Coder
   Thinh M. Le, X.H. Tian, B.L. Ho, J. Nankoo, Y. Lian (National University of Singapore)

Welcome Reception

Registration

N. Kanopoulos, ATMEL Corporation, USA
Rapid Development of SoC ICs in the Deep-Submicron Era: Requirements, Issues, and Techniques

Break

Session 4: Hardware Verification
(Session Chair: D. Papaefstahiou - Tech. Univ. of Crete)

1. Introspection Mechanisms for Semi-Formal Verification in a System-Level Design Environment
   M. Metzger (Université de Montréal), F. (Université de Montréal), F. Rousseau (TIMA Laboratory), J.Vachon (Université de Montréal), and E. M. Aboulhamid (Université de Montréal)
2. Asynchronous on-line monitoring of PSL assertions
   K. Morin-Allory, L. Fesquet, D. Borrione (TIMA Laboratory)
3. Formalizing the incremental design and verification process of a pipelined protocol converter
   C. Braunstein (Université Pierre et Marie Curie), E. Encrenaz (Laboratoire de Spécification et Vérification)
4. Integrated Verification Approach during ADL-driven Processor Design
   A. Chattopadhyay (ISS, RWTH Aachen University, Germany),
   A. Sinha (Department of CSE, IIT KGP, India), D. Zhang, R. Leupers, G. Ascheid , H. Meyr  (ISS, RWTH Aachen University, Germany)

Lunch + RSP program Committee Meeting

Session 5: Software Prototyping Methodologies
(Session Chair: D. Buchs - Univ. Geneva)

1. Wcomp: a Multi-Design Approach for Prototyping Applications using Heterogeneous Resources
   D. Cheung (CSTB), Y-J. Tigli, S. Lavirotte, M. Riveill (I3S)
2. An Agile BSP Modeling Methodology: Cross Platform BSP Framework (CPBF)
   C. Tianzhou, H. Wei, Y. Yan, (College of Computer Science, Zhejiang University)
3. A case-study of design space exploration for embedded multimedia applications on SoCs
   I. Hurbain, C. Ancourt, Francois Irigoin (Ecole des mines de Paris), M. Barreteau, N. Museux (THALES Research & Technology), F. Pasquier (Thomson R&D France)
4. A Business Process Prototyping Framework
   A. Chen, D. Buchs (University of Geneva)

Break

Session 6: Panel chaired by P. paulin (ST Microelectronics) with :

• D. Buchs - Univ. Geneva,
• A. Dollas - Tech. Univ. Crete,
• N. Kanopoulos - ATMEL Corporation,
• F. Kordon - Univ. P. & M. Curie.

Banquet Dinner

Registration

Session 7: Co-Design
(Session Chair: F. Kordon - Univ. P. & M. Curie)

1. An Embedded JVM using Network-on-Chip Design
   G. Mathias, K. Kent (University of New Brunswick)
2. Flexible Hardware/Software Interface Modeling Using High
   K. Lobna, A. Bouchhima, W. Youssef, A. A. Jerraya (TIMA Laboratory)
3. RTOS Scheduler Implementation in Hardware and Software for Real Time Applications
   M. Vetromille, L. Ost, C.. Marcon, C. Reif, F. Hessel (PPGCC - FACIN, PUCRS)
4. Application-Level Memory Optimization for MPSoC
   B. Girodias, Y. Bouchebaba, G. Nicolescu (Ecole Polytechnique de Montr´al), E.M. Aboulhamid (Universit´ de Montr´al), P. Paulin, B. Lavigueur (STMicroelectronics)

Break

Session 8: Advanced Simulation Techniques 
(Session Chair: M Aboulhamid - Univ. Montr´al)

1. Platform Development for Run-Time Reconfigurable Co-Emulation
   R. Siripokarpirom (Technical University Hamburg-Harburg)
2. Formal definitions of simulation interfaces in a continuous/discrete co-simulation tool
   L. Gheorghe, F. Bouchhima, G. Nicolescu, H. Boucheneb (Ecole Polytechnique de Montréal)
3. Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs
   C. Bieser, K.-D. Mueller-Glaser (University of Karlsruhe)
4. Development of an FPGA-based System for Real-Time Simulation of Photovoltaic Modules
   E. Koutroulis, K. Kalaitzakis, V. Tzitzilonis (Technical University of Crete)

Lunch

Session 8: Hardware Implementation
(Session Chair: D. Borrione - TIMA)

1. Parameter-specific fpga implementation of a dna sequence edit-distance calculation
   K. Kent, R. B. Proudfoot, Y. Zhao (University of New Brunswick)
2. A High Performance Parallel FIR Filters Generation Tool
   V. S. Rosa (Univ. Fed. Rio Grande do Sul), E. Costa (Univ. Catalica de Pelotas), S. Bampi (Univ. Fed. Rio Grande do Sul)
3. Rapid Prototyping of a System-on-a-Chip for the BLAST Algorithm Implementation
   E. Sotiriades, C. Kozanitis, G. Chrysos, A. Dollas (Technical University of Crete)
4. Design and Implementation of an Object Tracker on a Reconfigurable System on Chip
   F. Mühlbauer, C. Bobda (University of Kaiserslautern)

 Closing Session