18:00
21:00

Dockside Reception and Buffet and Registration

08:00

Breakfast / Registration

09:00

Opening Welcome

09:15

Keynote Speech

Architecture and Synthesis for multi-cycle on-chip communications
J. Cong, co-director of the VLSI CAD Laboratory,
Computer Science Department, University of California, Los Angeles

10:00

Break

10:30

Session 1: Design Environments I
(Session Chair: M. Shing, Naval Postgraduate School)

1. A Universal Low Cost Run-Time and Programming Environment for Reconfigurable Computing
   A. Dollas , D. Efstathiou, T. Kyriakides (Technical University of Crete)
2. A Component-Based Methodology for Embedded Systems Prototyping
   T. Patrick, S. Gerard, C. Mraidha, F. Terrier (CEA/LIST), J. Geib (LIFL)
3. i-CAD: A Rapid Prototyping CAD Tool for Intranet Design
   S. Habib (Kuwait University), A. Parker (University of Southern California)

12:00

Lunch

14:00

Session 2: Embedded Systems
(Session Chair: K. Müller-Glaser, FZI)

1. A New Process-Algebraic Specification Methodology for Embedded Systems
   S. F̦rster, M. Fischer, A. Windisch, B. Balser (EADS Military Aircraft), D. Monjau (Chemnitz University of Technology)
2. Embedded application prototyping on a reconfigurable communication-restricted platform
   A. Sasongko, A. Baghdadi, F.Rousseau, A.Jerraya (TIMA Laboratory, France)
3. Efficient Analysis of Mixed Signal ASICs for Smart Sensors
   N. Ker̦, T. Sauter (Vienna University of Technology)
4. Verification of Timing Properties in Rapid System Prototyping
   D. Drusinsky, M. Shing (Naval Postgraduate School)

16:00

Break                                 

16:30

Session 3: Signal Processing and ASIC Design
(Session Chair: W. Hardt, Technical Univ. Chemnitz)

1. An Efficient Methodology and Semi-automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells
   L.Tambour, N.Zergainoh, A.Jerraya (TIMA Laboratory), P.Urard, H.Michel (ST Microelectronics)
2. Simulation and Analysis of Embedded DSP Systems using the Petri Nets
   A. Deb, J. Oberg, A. Jantsch (Royal Institute of Technology)
3. A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture
   A. Rettberg, M. Zanella, C. Bobda, t. Lehmann (University of Paderborn, Paderborn, Germany)
4. Prototype-Based Tests for Hybrid Reactive Systems
   G. Hahn, J. Philipps (Validas Model Validation AG) A. Pretschner (Institut fur Informatik Technische Universitat Munchen), T. Stauner (BMW Car IT)

08:00

Breakfast / Registration

08:30 

Session 4: Applications
(Session Chair: F. Kordon, Univ. Paris 6)

1. Synthesis of LOTOS specification of the IEEE-1394 Firewire Protocol
   V. Carchiolo , M. Malgeri, G. Mangioni (Universita' di Catania, Italy)
2. Formal framework for Biological Regulatory Networks
   V. Bassano, G. Bernot (Lami, Université d'Evry)
3. Really Rapid Prototyping of Large-Scale Business Information Systems
   G. Milosavljevic, B. Perisic (University of Novi Sad)

10:00

Break

10:30

Session 5: Run-time Environments and Middleware
(Session Chair: L. Wills, Georgia Tech)

1. Evaluation of Middleware Architectures in Achieving System Interoperability
   P. Young (U.S. Naval Academy), N. Chaki, V. Berzins, Luqi (Naval Postgraduate School)
2. A Versatile Framework for FPGA Field Updates: An Application of Partial Self-Reconfiguation
   R. Fong, S. Harper, P. Athanas (Virginia Polytechnic Institute and State University)
3. Contributions to middleware architectures to prototype distribution infrastructures
   J. Hugues, L. Pautet (ENST), F. Kordon (Univ. P. & M. Curie)

12:00

Lunch

14:00

Session 6: Communications I
(Session Chair: P. Athanas, Virginia Tech)

1. Design and Prototyping a Fast Hadamard Transformer for WCDMA
   S. Bahl and J. Plusquellic (University of Maryland Baltimore County)
2. Hardware Evaluation of Low Power Communication Mechanisms for Transport Triggered Architectures
   T. Pionteck, A. Garcia, L. Kabulepa, M. Glesner (Darmstadt University of Technology, Germany)
3. Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
   C. Chang, B. Richards, A. Chen, N. Chan, R. Brodersen (University of California, Berkeley), K. Kuusilinna (Tampere University of Technology)

15:30

Break

16:00

Session 7: Modeling for Design I
(Session Chair: D. Lange, SSC SD)

1. An Instruction Throughput Model of Superscalar Processors
   T. Taha (Clemson University), D. Wills (Georgia Institute of Technology)
2. A highly configurable cache architecture for prototype embedded systems
   C. Zhang, F. Vahid (University of California, Riverside)

17:00

Panel session (sessin chair: L. Wills, Georgia Tech)

• F. Kordon (Univ. paris 6)
• K. Müller-Glaser (FZI)
• M. Shing (Naval Postgraduate School)

19:00
22:00

Banquet

08:00

Breakfast / Registration

08:30

Session 8: Communications II
(Session Chair: J. Drummond, SSC-SD)

1. Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems
   R. Ludewig, A. Garcia, T. Murgan, J. Hidalgo, M. Glesner (Darmstadt University of Technology, Germany)
2. Rapid Scheduling of Efficient FPGA Architectures for Next-Generation CDMA Wireless Communication Systems Using Tsunami Precision C Synthesizer
   Y. Guo, G. Xu, D. McCain (Nokia Research Center), J. Cavallaro (Rice University)
3. Rapid Prototyping of Realtime Communication - A Case Study: Interacting Robots
   S. Ihmor, N. Bastos Jr., R. Klein, M. Visarius, W. Hardt (University of Paderborn)

10:00

Break

10:30

Session 9: Design Environments II
(Session Chair: R. Ludevig, Darmstadt Univ. of Technology)

1. Exploring the Probabilistic Design Space of Multimedia Systems
   S. Hua (University of Maryland)
2. xDSL Systems Prototyping using a Reconfigurable Emulation Environment
   N. Papandreou (Computer Technology Institute), M. Varsamou, T. Antonakopoulos (University of Patras)
3. Rapid Prototyping and Incremental Evolution Using SLAM
   A. Herranz-Nieva , J. Moreno-Navarro (Universidad Polit̩cnica de Madrid)

12:00

Lunch

14:00

Session 10: Modeling for Design II
(Session Chair: F. Rousseau ( TIMA)

1. Comparative Rapid Prototyping, A Case Study
   Luqi, M. Shing, J. Puett, V. Berzins, Z. Guan, Y. Qiao, L. Zhang, N. Chaki, X. Liang, W. Ray, M. Brown, and D. Floodeen (Naval Postgraduate School)
2. Synthesizing Approach for Perspective-based Architecture Design
   X. Liang, J. Puett, Luqi (Naval Postgraduate School)
3. Rapid Exploration of Pipelined Processors through Automatic Generation of RTL Models
   P. Mishra, A. Kejariwal, N. Dutt (University of California, Irvine)

15:30

Break

16:00

Closing Remarks